Reference is made to co-pending application, "Yoked, Orthogonally Distributed Equal Reactance Amplifier," of Max Yoder filed Aug. 27, 1987, Ser. No. 087,892, and copending application "High Power Diamond Traveling Wave Amplifier" of Max Yoder, filed 9/25/87, Ser. No. 101,919.
The invention pertains to unipolar semiconductor amplifiers, and in particular presents integral single and multistage Field Effect Transister (FET) devices especially useful with microwave and millimeter wave signals.
Field Effect Transistors are commonly used as amplifiers of high frequencies, such as millimeter waves and microwaves, most often in common source amplifier circuits. Common source amplifiers, however, have the inherent theoretical drawback that their inputs and outputs cannot be impedance matched, making input and output phase cancellation inescapable, a consequence of which being that FET amplifiers have had to be made a small fraction of a wavelength in the direction of wave propagation through the FET so as to minimize phase cancellation. This, unfortunately, drastically limits the FET's power handling capability. Notably, however, common gate amplifiers can, as a matter of theory, have impedance matched inputs and outputs. Thus any FET that is internally designed to have a precisely matched input and output would, where employed in an appropriate common gate amplifier circuit, be of especial value as a high frequency amplifier.
Another limitation of FET power capacity results from a peculiar property of the crystalline structure of many semiconductors (such as gallium-arsenide) that occurs at the terminating edge of an epitaxially grown crystal. At the crystal's edge, or interface with another non-lattice-matched material, uncompleted covalent bonds tend to cross-bond weakly with one another, providing an unwanted source of charge carriers. These weakly bound surface or interface carriers (or trapped charges), rather than the carriers distributed throughout the rest of the device, determine the device's ultimate breakdown potential. Another limit on the gain and power capacity of an FET device is the breakdown voltage of the material separating the device's gate from the channel, i.e., the potential beyond which signal degrading leakage current occurs between the gate and the channel.
The upper frequency limit of any device is set by the device's response time, i.e., the speed by which carriers can traverse the device. In FET devices, potential on the gate controls a depletion region in the channel, around which current controlled by the FET must travel. The length of the depletion region in the direction of current flow depends on the transverse length of the gate itself. By reducing the transverse dimensions of the gate, one would reduce the depletion region's length thus enabling current to traverse a shorter path and the device to respond more rapidly. Another limit on device speed is the property of some semiconductors whereby carrier drift velocity, as a function of electric field intensity, increases to a maximum, then falls sharply. (An example is Gallium Arsenide, as illustrated in FIG. 4.) In FET devices, this property causes charge carrier transit to slow, rather than rise, with increasing channel potential beyond this maximum. (Carriers in such a high field region are called "sluggish" or "heavy.") Also, this property causes carrier bunching, and the formation of dipole domains or regions within the channel, generating local fields that impede the flow of carriers through the channel. This further limits device response speed, as well as making control of the device more difficult.
Finally, the fabrication of semiconductor devices is an especially delicate industrial process, and the more steps required to fabricate any device, and the less tolerant such steps are of error, the more the probability that the device will be produced with some fatal defect. Among the techniques least tolerant of error is the etching of desired configurations in semiconductor blocks. Of especial usefulness are semiconductors that have sharply different etchabilities so that, when used to form adjacent strata of the same chip, the etch resistant semiconductor can act as a simple and reliable etch stop for the less resistant semiconductor.
Accordingly, it is plain that any FET device that can overcome any or all of these limitations in the technology would be most welcome.